December 2, 2011 — Today's microprocessing chips employ up to 4 billion transistors, allowing computers, smartphones and other devices to run faster, store more data, be smaller and cost less than ever before. But what if this is "it" – that is, what if today's devices are as good as they get?
It's a valid concern, according to Benton H. Calhoun, associate professor of electrical and computer engineering at the University of Virginia. As transistors and other complex circuitry become smaller and thus more difficult to fabricate on a silicon chip, device manufacturers are running into significant physical design constraints. Specifically, today's memory circuits contain irregular shapes, which become exceedingly difficult to fabricate precisely at shrinking dimensions.
"We're starting to hit the physical limit of scaling," said Calhoun, of the Charles L. Brown Department of Electrical and Computer Engineering in the School of Engineering and Applied Science. "These circuits are actually down on the same scale or smaller than the wavelength of the light that is used to pattern them, and so it becomes harder and harder to draw these irregular shapes."
But there's no need to panic just yet. Calhoun and graduate student Randy W. Mann have invented a new circuit blueprint that could solve these physical design challenges for memory bit cells by replacing complex shapes with a series of straight lines. If adopted, the innovative new design could allow for more precise fabrication, even at an increasingly infinitesimal scale, and more densely packed memory chips.
Translation: Future generations of faster, better, smaller, less-expensive devices.
The University of Virginia Patent Foundation has filed for international patent protection on the novel design and is now seeking industrial partners interested in commercializing the technology.
In addition, with funding from the U.S. Defense Advanced Research Projects Agency and the National Science Foundation, Calhoun and graduate student Joseph F. Ryan have developed a sub-threshold field-programmable gate array – or FPGA – a type of integrated circuit that allows the end user flexibility to program or configure its functionality. While this flexibility typically comes at the cost of lost efficiency over hard-wired alternatives, Calhoun's ultra-low-power solution could be ideal for many devices requiring higher energy efficiency or extended battery life.
"There are a lot of applications out there that require a lot of computation but also reduced size, weight and power," he said, such as sensors to monitor environmental activity or the behavior of a material over time.
Calhoun's FPGA, which is also covered by international patent protection and available for licensing, operates at voltages as low as 0.2 volts, well below the threshold required to turn on a transistor.
"If you compare it to a faucet," he said, "the threshold is the point at which the water starts flowing, and we're using basically a bunch of barely dripping faucets to do useful work."
It's a valid concern, according to Benton H. Calhoun, associate professor of electrical and computer engineering at the University of Virginia. As transistors and other complex circuitry become smaller and thus more difficult to fabricate on a silicon chip, device manufacturers are running into significant physical design constraints. Specifically, today's memory circuits contain irregular shapes, which become exceedingly difficult to fabricate precisely at shrinking dimensions.
"We're starting to hit the physical limit of scaling," said Calhoun, of the Charles L. Brown Department of Electrical and Computer Engineering in the School of Engineering and Applied Science. "These circuits are actually down on the same scale or smaller than the wavelength of the light that is used to pattern them, and so it becomes harder and harder to draw these irregular shapes."
But there's no need to panic just yet. Calhoun and graduate student Randy W. Mann have invented a new circuit blueprint that could solve these physical design challenges for memory bit cells by replacing complex shapes with a series of straight lines. If adopted, the innovative new design could allow for more precise fabrication, even at an increasingly infinitesimal scale, and more densely packed memory chips.
Translation: Future generations of faster, better, smaller, less-expensive devices.
The University of Virginia Patent Foundation has filed for international patent protection on the novel design and is now seeking industrial partners interested in commercializing the technology.
In addition, with funding from the U.S. Defense Advanced Research Projects Agency and the National Science Foundation, Calhoun and graduate student Joseph F. Ryan have developed a sub-threshold field-programmable gate array – or FPGA – a type of integrated circuit that allows the end user flexibility to program or configure its functionality. While this flexibility typically comes at the cost of lost efficiency over hard-wired alternatives, Calhoun's ultra-low-power solution could be ideal for many devices requiring higher energy efficiency or extended battery life.
"There are a lot of applications out there that require a lot of computation but also reduced size, weight and power," he said, such as sensors to monitor environmental activity or the behavior of a material over time.
Calhoun's FPGA, which is also covered by international patent protection and available for licensing, operates at voltages as low as 0.2 volts, well below the threshold required to turn on a transistor.
"If you compare it to a faucet," he said, "the threshold is the point at which the water starts flowing, and we're using basically a bunch of barely dripping faucets to do useful work."
Media Contact
Article Information
December 1, 2011
/content/uva-professor-grad-students-straightening-out-memory-chip-design